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Memory architecture
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#	Item
321	Microsoft Word - A Novel Memory Metric and Measurement Methodology for Modern Memory System_TC 11.docx Add to Reading List Source URL: www.cs.iit.edu Language: English - Date: 2014-08-05 09:45:40 Computer architecture Computing Cache CPU cache Microprocessors Memory hierarchy Microarchitecture Acumem SlowSpotter Computer hardware Central processing unit Computer memory
322	ROSS-ICBS Phase 2 Interface FAQ’s for ICBS Users Updated: October 20, 2011 [New content in this update is shown in blue text below] ALERTS:  When I see alerts (e.g. NWCG ISSUE FAILURE ALERT), am I required to go in Add to Reading List Source URL: icbs.nwcg.gov Language: English - Date: 2011-11-21 14:17:28 Cache CPU cache RoS Spring Computer architecture Computing Computer memory
323	Cascaded Execution: Speeding Up Unparallelized Execution on Shared-Memory Multiprocessors Ruth E. Anderson, Thu D. Nguyen, and John Zahorjan Department of Computer Science and Engineering, BoxUniversity of Washin Add to Reading List Source URL: www.cs.virginia.edu Language: English - Date: 2003-05-13 13:55:18 Compiler optimizations CPU cache Cache Central processing unit Computer memory Parallel computing Speedup Pentium Register renaming Computer architecture Computing Computer hardware
324	Cascaded Execution: Speeding Up Unparallelized Execution on Shared-Memory Multiprocessors Ruth E. Anderson, Thu D. Nguyen, and John Zahorjan Department of Computer Science and Engineering, BoxUniversity of Washin Add to Reading List Source URL: www.cs.virginia.edu Language: English - Date: 2003-05-13 13:55:10 Central processing unit Parallel computing Compiler optimizations CPU cache Computer memory Speedup Automatic parallelization Pentium Pro Pentium Computer architecture Computer hardware Computing
325	Version 1.0 Communication, Interrupts and Protection David May: March 24, 2014 Communication and Input-Output Add to Reading List Source URL: www.cs.bris.ac.uk Language: English - Date: 2014-03-25 07:06:21 Operating system Interrupt Kernel System call Ring Direct memory access Transmission Control Protocol INT Process management Computer architecture Interrupts X86 instructions
326	EN164: Design of Computing Systems Lecture 31: Memory Systems 7 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Add to Reading List Source URL: scale.engin.brown.edu Language: English - Date: 2014-03-23 13:26:57 Computer memory Computer architecture Computing Translation lookaside buffer CPU cache Page table Page Memory management unit Cache Computer hardware Virtual memory Central processing unit
327	BakerSFIeld: Bringing software fault isolation to x64 Drew Dean Computer Science Lab SRI International Menlo Park, CA, USA Add to Reading List Source URL: www.cs.princeton.edu Language: English - Date: 2014-04-28 13:57:15 Machine code X86 instructions Central processing unit Programming language implementation X86 architecture Vx32 Google Native Client X86 Memory protection Computer architecture Computing Software
328	Dynamic Synthesis for Relaxed Memory Models Feng Liu Nayden Nedev Nedyalko Prisadnikov Add to Reading List Source URL: www.cs.technion.ac.il Language: English - Date: 2012-03-27 11:34:59 Transaction processing Concurrency Computer memory Linearizability Concurrent computing Non-blocking algorithm Memory barrier Sequential consistency Parallel computing Computing Concurrency control Computer architecture
329	Identifying and Predicting Timing-Critical Instructions to Boost Timing Speculation Jing Xin and Russ Joseph Department of EECS Northwestern University Add to Reading List Source URL: users.eecs.northwestern.edu Language: English - Date: 2011-12-14 11:29:00 Computer memory Central processing unit Branch predictor Hazard CPU cache Dynamic random-access memory Dynamic voltage scaling Microarchitecture Design closure Computer hardware Electronic engineering Computer architecture
330	Version 1.0 Communication, Interrupts and Protection David May: March 24, 2014 Communication and Input-Output Add to Reading List Source URL: www.cs.bris.ac.uk Language: English - Date: 2014-03-25 07:06:21 Operating system Interrupt Kernel System call Ring Direct memory access Transmission Control Protocol INT Process management Computer architecture Interrupts X86 instructions

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